A high-performance multilevel inverter with reduced power
electronic devices
الباحث الأول:
أ.م.د. عامر عبد المهدي
الباحثين الآخرين:
م.د. عدنان صبار ,
م.د. حر عبد الرضا
المجلة:
International Journal of Power Electronics and Drive Systems (IJPEDS)
تاريخ النشر:
None
مختصر البحث:
This paper introduces a new topology of multilevel inverter, which is able to operate
at high performance. This proposed circuit achieves requirements of reduced number
of switches, gate-drive circuits, and high design flexibility. In most cases f…
This paper introduces a new topology of multilevel inverter, which is able to operate
at high performance. This proposed circuit achieves requirements of reduced number
of switches, gate-drive circuits, and high design flexibility. In most cases fifteen-level
inverters need at least twelve switches. The proposed topology has only ten switches.
The inverter has a quasi-sine output voltage, which is formed by level generator and
polarity changer to produce the desired voltage and current waveforms. The detailed
operation of the proposed inverter is explained. The theoretical analysis and design
procedure are given. Simulation results are presented to confirm the analytical approach
of the proposed circuit. A 15-level and 31-level multilevel inverters were designed
and tested at 50 Hz.